1. Field of the Invention
The present invention relates generally to a semiconductor memory device, and more particularly, to a semiconductor memory device having a normal operation mode and a self-refresh mode.
2. Description of the Background Art
In recent years, portable computers have continued to be developed. A semiconductor memory device used in such a portable computer is required to have the capabilities of holding data such as file data which used to be performed by a conventional hard disk, and of operating with low power consumption in the data holding state.
In a semiconductor memory device, a self-refresh state generally corresponds to the data holding state.
Meanwhile, a technique to lower an external power supply voltage Ext.V.sub.CC in the data holding state (self-refresh mode), as shown in FIG. 27A, from about 3.3 V in a write mode and a read mode to about 2.5 V, for example, has been developed in order to reduce power consumption by portable computers. Herein, as shown in FIGS. 27B and 27C, switching from the write mode to the self-refresh mode is achieved by the generation of CBR (CAS Before RAS) timing in which an external column address strobe signal Ext./CAS is activated prior to an activation of an external row address strobe signal Ext./RAS. A self-refresh entry control signal /BBU is activated to a low (L:logical low) level as shown in FIG. 27D.
Reduction in an internal power supply voltage V.sub.CC in the data-holding state for power saving, however, causes the increase in a current Icc consumed in a substrate voltage generation circuit when voltage V.sub.CC is equal to or less than a voltage V.sub.c1 as shown by the solid line in FIG. 10. As a result, power consumption increases in the substrate voltage generation circuit, for example.
In addition, stable reading/writing operation from/to a memory cell is made difficult by lowering internal power-supply voltage V.sub.CC.